SST On the Scene

Craig Hunter, Intermolecular

Mon, 10 Aug 2009 12:22:40 -0700

Craig Hunter, VP and GM of Intermolecular's solar business unit, describes the company's recent successful effort to find solutions for optimizing surface morphology in solar cells.

Jitze Stienstra, Entegris

Fri, 11 Sep 2009 14:22:38 -0700

Jitze Stienstra, director of gas microcontamination at Entegris, discusses the challenges of managing contaminants in leading-edge lithographic processes -- which in EUV could come from process materials, wafers, reticles, resists, and even tools.

Hamid Zarringhalam, Nikon Precision

Wed, 23 Sep 2009 12:57:06 -0700

Hamid Zarringhalam, EVP, technology, sales and marketing, Nikon Precision, talks about the need to extend double-patterning immersion lithography to 22nm, and describes solutions to meet overlay accuracy requirements and target throughput of 200wph.

Jim Ohlsen, Entegris

Fri, 11 Sep 2009 14:23:05 -0700

Jim Ohlsen, director of materials characterization at Entegris, discusses methods to improve yield at 32nm by controlling molecular contaminants in microenvironments, and describes the multiple solutions that will be needed at 22nm.

Robert Rhoades, Entrepix

Tue, 04 Aug 2009 19:45:47 -0700

Robert Rhoades, CTO, Entrepix, describes the nontraditional technology behind TFT-dual gate memory and how CMP enables that innovation among others (e.g., TSVs, 3D packaging, MEMS, and engineered substrates).

Steven Dwyer, EV Group

Tue, 04 Aug 2009 19:36:37 -0700

Steven Dwyer, VP & GM, North America, at EV Group, highlights of 3D integration papers the company presented at SEMICON West: achieving alignment accuracy down to 200nm, thin wafer handling at thicknesses <10μm, and 300mm-capable wafer bonding.

Larry Smith, SEMATECH

Tue, 04 Aug 2009 19:19:32 -0700

Larry Smith, sr. member of the technical staff in SEMATECH's 3D interconnect division, discusses toolset acquisitions at the U. of Albany's CNSE, where work focuses on replacing traditional global interconnect and intermediate level processes.

Chuck Extrand, Entegris

Fri, 11 Sep 2009 14:23:44 -0700

Entegris principal scientist Chuck Extrand discusses the impact constituents such as oxygen and water have on microenvironments at advanced nodes, challenges with respect to purging, and the multipronged approach needed for microenvironments at 22nm.

John Antone, Applied Materials

Wed, 05 Aug 2009 06:19:17 -0700

John Antone, VP, Energy and Environmental Solutions at Applied Materials, distinguishes between peak parity and grid parity, and why he believes there's room for c-Si and thin-film technologies in utility-scale large field applications.

Bart Swinnen, IMEC

Mon, 03 Aug 2009 13:09:41 -0700

Bart Swinnen, director of interconnect and packaging in IMEC's process technology unit, discusses the status of 3D technology efforts -- in particular, IMEC's work on TSV tech that will enable higher aspect ratio TSVs suitable for thicker dies.

Franklin Kalk, Toppan Photomasks

Thu, 30 Jul 2009 10:55:26 -0700

Franklin Kalk, CTO at Toppan Photomasks, lists the lithography options for 22nm-16nm and below (immersion/double patterning, EUV, imprint) and why no option should be closed until a cost-effective solution is available with which everyone can live.

Jeff Welser, NRI

Tue, 28 Jul 2009 19:26:19 -0700

Jeff Welser, head of the SRC's Nanotechnology Research Initiative, talks about the semiconductor industry's need for a new switch to replace the transistor, possible options, and recent funding.

Jeff Hilbert, WiSpry

Tue, 28 Jul 2009 19:13:11 -0700

Jeff Hilbert, president and CEO of WiSpry talks about his company's approach to RF-MEMS with tunable capacitors.

J.C. Eloy, Yole Development

Tue, 28 Jul 2009 19:04:33 -0700

Jean Christophe (J.C.) Eloy, president and CEO of Yole Development, talks about the MEMS market and notable trends.

Eric Eisenhut, Kionix

Tue, 28 Jul 2009 18:53:48 -0700

Eric Eisenhut, vp of sales and marketing for Kionix, talks about his company's MEMS microsystems including accelerometers, gyroscopes and microfluidics.

Jeff Spiegelman, RASIRC

Tue, 28 Jul 2009 18:44:28 -0700

Jeff Spiegelman, founder and president of RASIRC, talks about the applications for high purity steam generation in IC and photovoltaics.

Hans Stork, Applied Materials

Tue, 28 Jul 2009 10:27:42 -0700

Hans Stork, group VP & CTO at Applied Materials, discusses the progress being made in developing cost-effective 3D/TSV solutions. The company is working in an open architecture environment to ensure complete solutions are ready for end users.

Emmanuel Van Kerschaver, IMEC

Tue, 28 Jul 2009 08:10:07 -0700

Emmanuel Van Kerschaver, Group Leader, Solar Cell Technology Group at IMEC, highlights recent developments at the research center, including an 18.5%-efficient solar cell with copper-plated contacts, and a chloride-free solar cell texturing process.

Horacio Mendez, SOI Industry Consortium

Mon, 27 Jul 2009 13:27:36 -0700

At SEMICON West, Horacio Mendez, executive director of the SOI Industry Consortium, previewed a major study that compares the manufacturability, performance, and cost of 3D transistors vs. bulk.

Matthias Meier, Fraunhofer Institute

Thu, 23 Jul 2009 11:22:35 -0700

Matthias Meier, manufacturing engineering & automation at the Fraunhofer Institute, discusses his role as "coach" of the PV Equipment Standards task force.

J.C. Kim, SEMI & Edwards Korea

Tue, 21 Jul 2009 08:30:45 -0700

SEMI's newly appointed chairman, J.C. Kim of Edwards Korea, talks about the need to revisit the value proposition for SEMICON trade shows, the changing mix of members, and the need to emphasize green initiatives.

Wally Rhines, Mentor Graphics

Mon, 20 Jul 2009 14:20:19 -0700

Wally Rhines, chairman and CEO of Mentor Graphics, summarizes the key themes from his keynote at SEMICON West: no consolidation, the 65nm-45nm ramps are nothing new, and the industry recovery will beat that of the general economy.

Ludo Deferm, IMEC

Thu, 16 Jul 2009 21:17:23 -0700

IMEC’s Ludo Deferm provides a look behind some major announcements the consortium made at SEMICON West: laser anneal over spike anneal, EUV mask cleaning, RuTa metallization showing promise for 22nm PVD.

Francois Henley, Silicon Genesis

Fri, 17 Jul 2009 10:48:00 -0700

Silicon Genesis president & CEO Francois Henley showcases the company's 20µm kerf-free foil, which is particularly well-suited to BiPV applications and capable of being made into solar cells with 20% efficiency.

John Borland, J.O.B. Technologies

Wed, 15 Jul 2009 22:52:33 -0700

The main theme at this year's NCCAVS Junction Technology Group meeting will be 22nm junction, which many believe this will be the first node to use msec-only annealing (i.e. diffusionless), according to meeting chair John O. Borland.

Ric Borges, Synopsys

Wed, 15 Jul 2009 18:21:12 -0700

Ric Borges of Synopsys discusses the application of TCAD simulation to multijunction and CPV solar cells.

Jeff Hebb, Ultratech

Wed, 15 Jul 2009 11:18:05 -0700

Jeff Hebb of Ultratech discusses extending laser spike annealing to the 22nm node, previewing a talk at the NCCAVS Junction Technology Group meeting held Thursday, July 16 in San Francisco.

Paul Siblerud, Semitool

Wed, 15 Jul 2009 05:30:08 -0700

Paul Siblerud of Semitool discusses 3D integration challenges and announces the latest news from the EMC-3D Consortium.

Jan Vardaman, TechSearch

Wed, 15 Jul 2009 06:37:33 -0700

Jan Vardaman discusses alternatives to 3D/TSV technologies for cost-sensitive applications, and makes the case for additional work to develop design guidelines and software, and test methodologies for 3D/TSV technologies.

André-Jacques Auberton-Hervé, Soitec

Wed, 15 Jul 2009 05:18:12 -0700

Soitec's president and CEO, André-Jacques Auberton-Hervé, discusses the three pillars of 3D integration at the wafer level, as well as bonding at room temperature.

Mark Thirsk, Linx Consulting

Fri, 11 Sep 2009 14:27:15 -0700

On a cost/Watt basis, thin-film solar PV is potentially very attractive, notes Linx Consulting's Mark Thirsk. If the technical challenges are solved, he's bullish that thin-film may take over a 30% share of the market.

Bryan Rice, SEMATECH

Fri, 11 Sep 2009 14:30:42 -0700

SEMATECH's Bryan Rice gives a positive assessment of EUV and offers hope for getting companies to open their checkbooks for mask inspection infrastructure funding.

Bill McClean, IC Insights

Wed, 08 Jul 2009 17:02:56 -0700

Bill McClean, president of IC Insights, talks about the rebound of the semiconductor industry in 2009, and his expectations of double digit growth in 2010 and 2011.

BJ Han, CTO, STATS ChipPAC

Wed, 08 Jul 2009 17:02:05 -0700

B.J. Han, chief technology officer of STATS ChipPAC talks about trends in advanced packaging technology.

Harry Levinson, AMD

Tue, 03 Mar 2009 09:44:50 -0800

Harry Levinson, manager of strategic litho technology and Sr. Fellow at AMD, tells why 32nm manufacturing will be a big success, and 40nm hp is realistic.

Griff Resor, Resor Associates

Tue, 03 Mar 2009 09:48:07 -0800

Griff Resor, president of Resor Associates, explains why he thinks it's premature to concede EUV to 16nm rather than 22nm.

Jan Macie, Brewer Science

Tue, 03 Mar 2009 09:44:05 -0800

Jan Macie, technical product manager at Brewer Science, discusses the challenges of hyper-NA tools for resist developers, and projects out to 22nm.

Kurt Ronse, IMEC

Tue, 03 Mar 2009 09:47:20 -0800

Kurt Ronse, director of lithography at IMEC, reports on EUV plans still targeting 22nm hp: good progress for resists, but not reticle defectivity.

John Allgair, ISMI

Tue, 03 Mar 2009 09:45:32 -0800

John Allgair, program manager, metrology division at ISMI, outlines the metrology decisions and challenges that remain at 32nm and 22nm.

Mark Slezak, JSR Micro

Tue, 03 Mar 2009 09:46:11 -0800

Mark Slezak, director of lithography technology, JSR Micro, discusses the three main challenges facing resist development for EUV.

Scaling to 16nm?

Thu, 26 Feb 2009 08:20:57 -0800

Tim Farrell, distinguished engineer at IBM's semiconductor R&D center.

PV's "virtuous cycle"

Fri, 27 Feb 2009 13:41:06 -0800

Griff Resor analyzes Gilad Almogy's SPIE keynote about how the "virtuous cycle" in semiconductor and display markets can spur photovoltaics.

Progress on 22nm -- and scaling to 16nm

Fri, 27 Feb 2009 13:07:24 -0800

Charlie Albertalli, director of marketing, RET & MDP, Mentor Graphics

Lars Liebmann, distinguished engineer, DFM, IBM

Mon, 02 Mar 2009 10:51:09 -0800

IBM’s Lars Liebmann explains what IBM and PDF Solutions have developed to address lithography challenges at 22nm: design flow logic templates.

Litho update: 32nm, 22nm+

Mon, 02 Mar 2009 17:34:30 -0800

ASML’s Martin van den Brink discusses the readiness of lithography infrastructure to get to 22nm and below, including EUV.

Ready for 32nm manufacturing

Fri, 27 Feb 2009 14:16:29 -0800

Nikon’s Corp.’s Andy Hazelton summarizes 32nm manufacturing readiness and addresses challenges at 22nm.

1X mask infrastructure

Sun, 01 Mar 2009 10:37:11 -0800

Mark Melliar-Smith, CEO of Molecular Imprints, discusses the company's work to develop a 1X mask infrastructure.

Making a pitch for EUV

Wed, 04 Mar 2009 12:18:32 -0800

Stefan Wurm, AMD assignee to SEMATECH and associate director of the lithography division, provides an update on EUV lithography

Franklin Kalk, Toppan Photomasks

Wed, 04 Mar 2009 12:57:19 -0800

Franklin Kalk, CTO at Toppan Photomasks, discusses the remaining work for the integration phase of 32nm manufacturing and looks ahead to 16nm: "We'll know within probably two years, if EUV will be ready for 16nm."

Mark Slezak, JSR Micro

Wed, 04 Mar 2009 13:18:37 -0800

Mark Slezak, director of lithography technology at JSR Micro, weighs in Bernie Meyerson's SPIE kenote urging industry “coopetition"

Ric Borges, Synopsys

Thu, 28 Aug 2008 13:34:23 -0700

Rick Borges, senior product marketing manager at Synopsys, talks to Pete Singer about the company's TCAD products designed for modeling the solar cell processes and structures.

Mike Ciesinski, FlexTech Alliance

Wed, 23 Jul 2008 18:33:00 -0700

Mike Ciesinski, CEO of the FlexTech Alliance, updates SST’s editor-in-chief, Pete Singer, on the successor organization to the U.S. Display Consortium.

Ludo Deferm, IMEC

Wed, 23 Jul 2008 13:20:26 -0700

IMEC’s VP of business development, Ludo Deferm, discusses the outlook for the funding of 3D integration development, telling SST’s Sr. Technical Editor, Debra Vogler, that IDM’s will be key, as the assembly and test houses are not taking the lead on

David Butler, Aviza Technology

Mon, 18 Aug 2008 09:27:23 -0700

David Butler, VP of marketing at Aviza Technology, tell SST senior technical editor, Debra Vogler, that while the performance improvement of traditional scaling had been about 60%, the performance payback is only about 15%.

Jim Walker, Gartner/Dataquest

Mon, 18 Aug 2008 09:26:54 -0700

Packaging goes PoP, enabling cost-effective scaling and a fast time-to-market. An interview with Jim Walker of Gartner/Dataquest.

Erik Smith, Qcept

Mon, 18 Aug 2008 12:48:33 -0700

Qcept Technologies gets “a visual” on defects

Jim Lamb, Brewer Science

Mon, 18 Aug 2008 12:58:11 -0700

Brewer Science dishes on new products for 3D packaging

Steve Dwyer, EVG

Mon, 18 Aug 2008 12:55:07 -0700

EV Group gets a “handle” on TSV technology

Tom Ritzdorf, Semitool

Fri, 17 Oct 2008 12:45:12 -0700

Tom Ritzdorf, director of ECD technology at Semitool, updates SST on the progress of the EMC 3D consortium, whose aim is to reduce the cost of 3D interconnects/TSV.

George Scalise, SIA

Thu, 24 Jul 2008 06:10:38 -0700

George Scalise, president of SIA, tells SST’s editor-in-chief, Pete Singer, that the semiconductor industry has a disconnect between equipment demand and capacity utilization. “The demand for equipment is way down – about 20% this year over last year

Aki Fujimura, D2S

Thu, 24 Jul 2008 06:15:40 -0700

D2S chairman & CEO, Aki Fujimura, tells SST’s Sr. Technical Editor, Debra Vogler, about the quickening pace of development of maskless ebeam lithography. The company’s DFEB software is of particular interest to low-volume manufacturers of SoCs and AS

Mihir Parikh, Aquest Systems

Thu, 24 Jul 2008 06:22:02 -0700

SST’s editor-in-chief, Pete Singer, interviews Mihir Parikh, president and CEO of Aquest Systems, who discusses improving fab productivity and equipment productivity using high-capacity material handling technology. The company has been using its Asi

Vicki Hadfield, SEMI

Fri, 12 Jun 2009 09:36:05 -0700

Vicki Hadfield outlines SEMI's stance on four key elements of US government policy key to its members: tax, trade, technology, and talent.

John Borland, J.O.B. Technologies

Tue, 22 Jul 2008 08:32:06 -0700

John O. Borland highlights the West Coast Junction Technology Group's presentation at SEMICON West on ultrashallow junctions at the 32nm node.

Steven Dwyer, EV Group

Wed, 23 Jul 2008 14:34:51 -0700

Steven Dwyer, VP/GM at EV Group North America, discusses wafer-to-wafer and die-to-wafer integration and selecting wafer carrier materials.

John Knickerbocker, IBM

Fri, 25 Jul 2008 09:36:01 -0700

IBM's John Knickerbocker discusses how 3D integration is unfolding at IBM over the next five years, starting in 2H08 for a wireless application.

Bob Sankman, Intel

Wed, 23 Jul 2008 13:48:06 -0700

Bob Sankman of Intel reviews the likely roadmap for 3D integration and the trade-offs between wafer-to-wafer, die-to-wafer, and die-to-die integration.

Sitaram Arkalgud, SEMATECH

Wed, 30 Jul 2008 09:24:23 -0700

Sitaram Arkalgud, director, 3D interconnect division at SEMATECH, tells SST’s senior technical editor, Debra Vogler, that a reasonable roadmap for 3D integration starts out with CMOS image sensors – already in volume production – along with memory st

Jim Lamb, Brewer Science

Wed, 23 Jul 2008 14:33:29 -0700

Brewer Science's Jim Lamb discussed his company's current and future work with 3D integration, from TSV for RF MEMS to image sensors and memory stacking.

Michel Brillouet, CEA/LETI

Wed, 23 Jul 2008 14:08:56 -0700

Michel Brillouet of CEA/LETI believes bilateral cooperation with labs, not large consortia efforts, will be key in driving 3D integration efforts.

Lars Liebmann, IBM

Wed, 12 Mar 2008 09:25:28 -0700

Debra Vogler of Solid State Technology interviews Lars Liebmann, Distinguished Engineer, Design for Manufacturability at IBM, at the 2008 SPIE Advanced Lithography Conference.

Ben Eynon, SEMATECH (Samsung assignee)

Wed, 12 Mar 2008 09:25:14 -0700

Debra Vogler of Solid State Technology interviews Benjamin Eynon, Associate Director of Lithography, and Samsung assignee to SEMATECH, at the 2008 SPIE Advanced Lithography Conference.

Mireille Maenhoudt, IMEC

Wed, 12 Mar 2008 09:25:57 -0700

Debra Vogler of Solid State Technology interviews Mireille Maenhoudt, Litho Process Development Group Manager at IMEC, at the 2008 SPIE Advanced Lithography Conference.

Franklin Kalk, Toppan Photomasks

Wed, 12 Mar 2008 09:23:30 -0700

Debra Vogler of Solid State Technology interviews Franklin Kalk, CTO at Toppan Photomasks, at the 2008 SPIE Advanced Lithography Conference.

John Sturtevant , Mentor Graphics

Wed, 12 Mar 2008 09:25:42 -0700

Debra Vogler of Solid State Technology interviews John Sturtevant, RET Technology Support Manager at Mentor Graphics, at the 2008 SPIE Advanced Lithography Conference.

Christopher Sparkes, Nikon Precision

Wed, 12 Mar 2008 08:30:23 -0700

Debra Vogler of Solid State Technology interviews Christopher Sparkes, Sr. Director of Technology at Nikon Precision, at the 2008 SPIE Advanced Lithography Conference.

Harry Levinson, AMD

Wed, 12 Mar 2008 09:23:15 -0700

Debra Vogler of Solid State Technology interviews Harry Levinson, Manager of Strategic Lithography Technology and Sr. Fellow at AMD, at the 2008 SPIE Advanced Lithography Conference.

Griff Resor, Resor Associates

Wed, 12 Mar 2008 09:27:55 -0700

Debra Vogler of Solid State Technology interviews Griff Resor, President of Resor Associates, at the 2008 SPIE Advanced Lithography Conference.

Stefan Wurm, SEMATECH

Wed, 12 Mar 2008 09:27:07 -0700

Debra Vogler of Solid State Technology interviews Stefan Wurm, Program Manager, EUV Strategy at SEMATECH, at the 2008 SPIE Advanced Lithography Conference.

Kurt Ronse, IMEC

Wed, 12 Mar 2008 09:26:52 -0700

Debra Vogler of Solid State Technology interviews Kurt Ronse, Director of Lithography at IMEC, at the 2008 SPIE Advanced Lithography Conference.

Mark Melliar-Smith, Molecular Imprints

Wed, 12 Mar 2008 09:26:38 -0700

Debra Vogler of Solid State Technology interviews Mark Melliar-Smith, CEO of Molecular Imprints, at the 2008 SPIE Advanced Lithography Conference.

J. Tracy Weed, Synopsys

Wed, 12 Mar 2008 09:26:23 -0700

Debra Vogler of Solid State Technology interviews J. Tracy Weed, Director, Director, Manufacturing Products Group, at Synopsys, at the 2008 SPIE Advanced Lithography Conference.

Semicon West 2007 -- John Borland, J.O.B. Technologies

Tue, 17 Jul 2007 00:00:00 -0700

Shortly after the Praxair Electronics Technology Forum, John Borland, founder and president of J.O.B. technologies, discusses areas of contention facing IC manufacturers as they go from 45nm to 32nm.

Semicon West 2007 -- Raj Jammy, SEMATECH/IBM assignee

Tue, 17 Jul 2007 00:00:00 -0700

Following the Praxair ElectronicTechnology Forum, Raj Jammy, director front end processes for SEMATECH/IBM assignee, discusses how IC manufacturers are pursuing solutions for controlling process variability, high-k/metal gates, and annealing.

Semicon West 2007 -- Cynthia Hoover, Praxair Inc.

Wed, 12 Mar 2008 08:50:23 -0700

Cynthia Hoover, Director of Electronics R&D for Praxair Inc. discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Semicon West 2007 -- Ed Korczynski, Solid State Technology

Wed, 12 Mar 2008 08:50:40 -0700

Ed Korczynski, Senior Technical Editor for Solid State Technology discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Semicon West 2007 -- Paul Gilman, Praxair Electronics

Wed, 12 Mar 2008 08:52:44 -0700

Paul Gilman, director of Technology Deposition Materials for Praxair Electronics discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Semicon West 2007 -- David Gross, Global Manuf Sys Tech

Wed, 12 Mar 2008 08:52:30 -0700

David Gross, Global Manufacturing Systems Technology, 300 mm engineering, AMD discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Semicon West 2007 -- John Allgair, SEMATECH

Wed, 12 Mar 2008 08:52:15 -0700

John Allgair, Metrology Program Manager, AMD assignee to the International SEMATECH Maufacturing Initiative discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Semicon West 2007 -- Alain Diebold, University at Albany

Wed, 12 Mar 2008 08:52:02 -0700

Alain Diebold, Empire Innovation Professor of Nanoscale Science, College of Nanoscale Science and Engineering, University at Albany discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Semicon West 2007 -- Ludo Deferm, IMEC

Wed, 12 Mar 2008 08:50:10 -0700

Ludo Deferm, VP, Business Development, IMEC discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Semicon West 2007 -- Larry Larson, SEMATECH

Wed, 12 Mar 2008 08:51:47 -0700

Larry Larson, Front End Associate Director, SEMATECH discusses contentions facing IC manufacturers as they go from 45 nm to 32nm.

Franklin Kalk, Toppan Photomasks

Wed, 12 Mar 2008 08:35:52 -0700

Franklin Kalk, CTO, Toppan Photomasks discusses how the industry is finding ways to extend 193nm immersion such that many anticipate its use in volume manufacturing below 65nm half-pitch.

Harry Levinson, Strategic Lithography Technology

Wed, 12 Mar 2008 09:29:01 -0700

Harry Levinson, Manager of Strategic Lithography Technology & AMD Fellow discusses ways the industry is extending 193nm immersion such that many anticipate its use in volume manufacturing below 65nm half-pitch.

Paul van Attekum, Incubator Products

Wed, 12 Mar 2008 08:35:37 -0700

Paul van Attekum, SVP & Business Unit Manager, Incubator Products ASML discusses ways the industry is extending 193nm immersion such that many anticipate its use in volume manufacturing below 65nm half-pitch.

Bob Akins, Cymer

Wed, 12 Mar 2008 09:22:32 -0700

Bob Akins, Co-founder, Chairman, CEO, Cymer discusses ways the industry is extending 193nm immersion such that many anticipate its use in volume manufacturing below 65nm half-pitch.

Bob Naber, Cadence Design Systems

Wed, 12 Mar 2008 08:29:50 -0700

Bob Naber, Product Marketing Director of RET Solutions, Cadence Design Systems discusses ways the industry is extending 193nm immersion such that many anticipate its use in volume manufacturing below 65nm half-pitch.

Kurt Ronse, IMEC

Wed, 12 Mar 2008 09:28:47 -0700

Kurt Ronse, Director of Lithography, IMEC discusses ways the industry is extending 193nm immersion such that many anticipate its use in volume manufacturing below 65nm half-pitch.

Lars Liebmann, IBM

Wed, 12 Mar 2008 09:29:59 -0700

Lars Liebmann, Distinguished Engineer, Design for Manufacturability, IBM discusses challenges that DFM solutions will have to meet as the industry moves from 65nm to 45nm and beyond.

Hans Stork, CTO TI

Wed, 12 Mar 2008 09:28:32 -0700

Hans Stork, SVP, CTO TI discusses challenges that DFM solutions will have to meet as the industry moves from 65nm to 45nm and beyond.

John Sturtevant, Mentor Graphics

Wed, 12 Mar 2008 08:36:06 -0700

John Sturtevant, RET Technology Support Manager, Mentor Graphics discusses challenges that DFM solutions will have to meet as the industry moves from 65nm to 45nm and beyond.

Michael Lercel, SEMATECH

Wed, 12 Mar 2008 09:30:17 -0700

Michael Lercel, Lithography Director at SEMATCH (IBM assignee), discusses challenges that DFM solutions will have to meet as the industry moves from 65nm to 45nm and beyond.

Gary Smith, Gary Smith EDA

Wed, 12 Mar 2008 09:29:43 -0700

Gary Smith, Chief Analyst, Gary Smith EDA discusses challenges that DFM solutions will have to meet as the industry moves from 65nm to 45nm and beyond.

Axel Nackaerts, IMEC

Wed, 12 Mar 2008 09:22:16 -0700

Axel Nackaerts, Senior Engineer, IMEC discusses challenges that DFM solutions will have to meet as the industry moves from 65nm to 45nm and beyond.

Semicon West 2006 -- Anantha Sethuraman, Synopsys, Inc.

Wed, 12 Mar 2008 08:41:00 -0700

Anantha Sethuraman, VP, Design for Manufacturing, Synopsys, Inc. talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- André-Jacques Auberton-Hervé, Soitec

Wed, 12 Mar 2008 08:34:02 -0700

André-Jacques Auberton-Hervé, President, CEO and Chairman of the Board, Soitec talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- David L. Dutton, Mattson Technology

Wed, 12 Mar 2008 08:50:54 -0700

David L. Dutton, CEO, Mattson Technology talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- David Lam, Chairman, David Lam Group

Wed, 12 Mar 2008 08:34:28 -0700

David Lam, Chairman, David Lam Group talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Francois J. Henley, Silicon Genesis

Wed, 12 Mar 2008 08:34:15 -0700

Francois J. Henley, President and CEO, Silicon Genesis talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- John Ogawa Borland, Founder, J.O.B. Tec

Wed, 12 Mar 2008 08:41:14 -0700

John Ogawa Borland, Founder, J.O.B. Technologies talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Kevin P. Fahey, FEI Company

Wed, 12 Mar 2008 08:34:58 -0700

Kevin P. Fahey, GM NanoElectronics Fab Division, FEI Company talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Kurt Lackenbucher, EVP & COO, SEZ

Wed, 12 Mar 2008 08:41:34 -0700

Kurt Lackenbucher, EVP & COO, SEZ talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Ludo Deferm, IMEC

Wed, 12 Mar 2008 08:40:27 -0700

Ludo Deferm, VP of Business Development, IMEC talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Mark Namaroff, Axcelis Technologies

Wed, 12 Mar 2008 08:41:48 -0700

Mark Namaroff, Sr. VP of Marketing, Axcelis Technologies talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Martin van den Brink, ASML

Wed, 12 Mar 2008 08:40:13 -0700

Martin van den Brink, EVP Marketing & Technology, ASML talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Sasson Somekh, Novellus Systems

Wed, 12 Mar 2008 08:38:31 -0700

Sasson Somekh, President, Novellus Systems talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Scott Kramer, SEMATECH

Wed, 12 Mar 2008 08:40:44 -0700

Scott Kramer, Director of ISMI, SEMATECH talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

Semicon West 2006 -- Ted Vucurevich, Cadence Design Systems

Wed, 12 Mar 2008 08:34:43 -0700

Ted Vucurevich, Sr. VP, CTO, Advanced R&D, Cadence Design Systems, Inc. talks to SST about the next 10 years: cost-effective lithography, managing R&D costs, scheduling invention, transitioning to 450nm wafers, and new business models.

WaferNEWS -- Aida Jebens, VLSI Research

Thu, 13 Mar 2008 14:29:13 -0700

Aida Jebens, Senior Economist at VLSI Research, reviewed her firm's industry weather forecast, which shows a "cooling" and cloudy outlook for display equipment and "flat" for chip tools, though next year's forecast looks to be improved.

WaferNEWS -- Andrew Grenville, SEMATECH

Thu, 13 Mar 2008 14:29:30 -0700

Andrew Grenville, associate director of lithography and Intel assignee to SEMATECH, anticipates that there will be enough data by the end of 2007 to be able to make an assessment on the viability of EUV for 32nm half-pitch.

WaferNEWS -- Griff Resor, Resor Associates

Thu, 13 Mar 2008 14:29:52 -0700

EUV has some big hurdles to overcome, according to Griff Resor, president of Resor Associates, who says that "for people on the two-year cycle, it's going to be late."